1. Field of the Invention
The present invention relates to a display drive device, a drive control method of the same, and a display apparatus having the same, and particularly relates to a display drive device suitably applicable to a display panel conforming to an active-matrix type drive system, a drive control method of the same, and a display apparatus having the same.
2. Description of the Related Art
In recent years, a liquid crystal display (LCD) has been frequently used as a display apparatus (display) for displaying image and character information, etc. in imaging apparatuses such as widely-spreading digital video cameras and digital still cameras, and in portable apparatuses such as cellular phones and personal digital assistants (PDA). Further, a liquid crystal display is widely used as a monitor or display apparatus for information terminals such as computers and for visual equipment such as television sets. A liquid crystal display used for such purposes is thin-shaped, light-weighted, adaptable to low power consumption, and excellent in display quality.
A liquid crystal display according to prior art will now be briefly described.
FIG. 21 is a block diagram showing a schematic configuration of a liquid crystal display according to prior art having display pixels of a thin-film transistor type.
FIG. 22 is an equivalent circuit diagram showing one example of a principal configuration of a liquid crystal display panel according to prior art.
As illustrated in FIG. 21 and FIG. 22, a liquid crystal display 100P according to prior art comprises a liquid crystal display panel (display panel) 110P in which display pixels Px are arranged two-dimensionally, a gate driver (scanning drive circuit) 120P, a source driver (signal drive circuit) 130P, an LCD controller 150P, a display signal generation circuit 160P, and a common signal drive amp (drive amp) 170P. The gate driver 120P sequentially scans the group of display pixels Px in each row of the liquid crystal display panel 110P to set the scanned pixels Px to a selected state. The source driver 130P outputs a display signal voltage based on a video signal, simultaneously to the group of display pixels Px in the row set to the selected state. The LCD controller 150P generates and outputs control signals (horizontal control signal, vertical control signal, etc.) for controlling operation timings of the gate driver 120P and the source driver 130P. The display signal generation circuit 160P extracts various timing signals (horizontal synchronous signal, vertical synchronous signal, composite synchronous signal, etc.) from video signals and outputs the extracted signals to the LCD controller 150P, and it also generates display data comprising a luminance signal and outputs it to the source driver 130P. The common signal drive amp 170P applies, based on a polarity inverting signal FRP generated by the LCD controller 150P, a common signal voltage Vcom having a predetermined voltage polarity to a common electrode (opposing electrode) provided in common for the display pixels Px in the liquid crystal display panel 110P.
As shown in FIG. 22, the liquid crystal display panel 110P comprises opposing transparent substrates between which a plurality of scanning lines SL and a plurality of data line DL are arranged so as to intersect each other orthogonally in row and column directions, and the plurality of display pixels (liquid crystal display pixels) Px are arranged adjacent to the intersections of the scanning lines SL and data lines DL. Each display pixel Px comprises a pixel transistor TFT, a pixel capacitor (liquid crystal capacitor) Clc, and a compensating capacitor (storage capacitor) Cs. The pixel transistor TFT is formed of a thin film transistor whose source-drain (current path) is connected between a pixel electrode and the data line DL and whose gate (control terminal) is connected to the scanning line SL. The pixel capacitor Clc is formed of liquid crystal molecules scaled and held between the pixel electrode and the common electrode opposing to the pixel electrode and provided in common for all the display pixels Px. The compensating capacitor Cs is a capacitor which is arranged in parallel with the pixel capacitor Clc and stores a signal voltage applied to the pixel capacitor Clc.
The scanning lines SL and the data lines DL arranged in the liquid crystal display panel 110P are connected via connection terminals TMg and TMs to the gate driver 120P and the source driver 130P which are provided independently from the liquid crystal display panel 110P. An electrode (compensating electrode) at the other end of the compensating capacitor Cs receives application of a predetermined voltage Vcs (for example, a common signal voltage Vcom) via a common connection lines CL.
In the liquid crystal display 100P having the above-described configuration, display data supplied from the display signal generation circuit 160P and corresponding to display pixels in one row of the liquid crystal display panel 110P are sequentially acquired by the source driver 130P based on a horizontal control signal supplied from the LCD controller 150P. In the meantime, based on a vertical control signal supplied from the LCD controller 150P, the gate driver 120P sequentially applies a scanning signal to the scanning line SL arranged in the liquid crystal display panel 110P. As a result, the pixel transistors TFT of the group of display pixels Px in each row are turned on and set to the selected state in which each pixel can acquire a display signal voltage. In synchronization with the timing the group of display pixels Px in each row are selected, the source driver 130 supplies a display signal voltage based on the acquired display data simultaneously to the display pixels Px via the data lines DL.
As a result, via the pixel transistor TFT of each display pixel Px set to the selected state, the liquid crystal molecules sealed in the pixel capacitor Clc change their orientation state in accordance with the display signal voltage and perform a predetermined gradational display operation, and the compensating capacitor Cs connected in parallel to the pixel capacitor Clc is charged with the voltage applied to the pixel capacitor Clc. By this series of operations being repeated for the rows included in one screen, desired image information based on a video signal is displayed on the liquid crystal display panel 110P.
As shown in FIG. 21 and FIG. 22, such a mounting structure for a liquid crystal display has been known, in which the gate driver 120P and source driver 130P as peripheral circuits are provided independently from insulating substrates such as grass substrates or the like forming the liquid crystal display panel 110P (in which the pixel array is formed), and the liquid crystal display panel 110P and the peripheral circuits are electrically connected via the connection terminals TMg and TMs. In addition to this structure, also known is a structure in which the gate driver 120 and source driver 130 are formed on the insulating substrates integrally with the pixel array (display pixels Px) by employing polysilicon transistors.
However, the liquid crystal display as described above has the following problems.
That is, according to the structure shown in FIG. 21 and FIG. 22, if the liquid crystal display panel 110P is adapted to higher precision in order to improve the display quality, the number of data lines is increased. Along with this, the number of output terminals of the gate driver 120 and source driver 130 is increased and the circuit scale of each driver (the gate driver 120 and the source driver 130) is expanded. Thus, the size of the chip forming each driver becomes large, resulting in a problem that the mounting area of each driver is increased and the cost of each driver circuit is raised. A further problem is that along with the expansion of the circuit scale, the power consumed by each driver circuit is increased.
Moreover, as the number of output terminals of the gate driver 120P and source driver 130P is increased, the number of connection terminals for connecting the liquid crystal display panel 110P and each driver is increased and the pitch between the connection terminals becomes small. Therefore, the number of steps required in connection process is increased and a higher connection precision is required, leading to a problem that the production cost is raised.
As a technique for solving the problem regarding the number of steps required for connecting the liquid crystal display panel and peripheral circuits and the problem of connection precision, there is known a structure in which a liquid crystal display panel, a gate driver, and a source driver are integrally formed on a single insulating substrate, with the use of polysilicon transistors. However, unlike transistor devices such as an amorphous silicon transistor, for which a production technique has been established and from which a good device property (operation property) can be obtained, a polysilicon transistor has to go through a complicated production process that costs high, and its operation property is insufficient. Therefore, there has been a problem that the production cost required for a liquid crystal display apparatus becomes higher and a stable display characteristic is hard to obtain.